HDMI CEC: config only, but the board wiring is unverified #45

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opened 2026-08-28 09:27:58 +00:00 by tiagoagueda · 2 comments

tiagoagueda commented

2026-08-28 09:27:58 +00:00

Owner

The controller has a CEC block — CONFIG0_ID = 0xbf and HDMI_CONFIG0_CEC = 0x02 is set,
read off this board.

No code is needed. dw_hdmi_probe() instantiates a dw-hdmi-cec platform device by itself
when that bit is set:

if (!plat_data->disable_cec && (config0 & HDMI_CONFIG0_CEC)) {
        pdevinfo.name = "dw-hdmi-cec";
        hdmi->cec = platform_device_register_full(&pdevinfo);
}

and sun8i_dw_hdmi.c never sets disable_cec. It needs only CONFIG_DRM_DW_HDMI_CEC and
CEC_CORE, both currently off.

The pin is there too: mainline's sun9i pinctrl has PH21 as function 2 "hdmi" with the
comment /* CEC */, and it is already in the hdmi_pins group alongside PH19 (SCL) and PH20
(SDA). PH21 is claimed by nothing else in the board's script.bin — no repeat of the PL01
or PH18 traps.

⚠️ What is not established: whether this board actually routes PH21 to pin 13 of the HDMI
connector. [hdmi_para] in the fex never mentions CEC in any form, so there is no vendor
evidence either way. Only a real CEC device on the other end can settle it.

See 44-hdmi.md.

The controller has a CEC block — `CONFIG0_ID = 0xbf` and `HDMI_CONFIG0_CEC = 0x02` is set, read off this board. **No code is needed.** `dw_hdmi_probe()` instantiates a `dw-hdmi-cec` platform device by itself when that bit is set: ```c if (!plat_data->disable_cec && (config0 & HDMI_CONFIG0_CEC)) { pdevinfo.name = "dw-hdmi-cec"; hdmi->cec = platform_device_register_full(&pdevinfo); } ``` and `sun8i_dw_hdmi.c` never sets `disable_cec`. It needs only `CONFIG_DRM_DW_HDMI_CEC` and `CEC_CORE`, both currently off. The pin is there too: mainline's sun9i pinctrl has **PH21** as function 2 `"hdmi"` with the comment `/* CEC */`, and it is already in the `hdmi_pins` group alongside PH19 (SCL) and PH20 (SDA). PH21 is claimed by **nothing else** in the board's `script.bin` — no repeat of the PL01 or PH18 traps. ⚠️ **What is not established:** whether this board actually routes PH21 to pin 13 of the HDMI connector. `[hdmi_para]` in the fex never mentions CEC in any form, so there is no vendor evidence either way. Only a real CEC device on the other end can settle it. See [44-hdmi.md](44-hdmi.md).

tiagoagueda added the

hardware

P3-normal

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2026-08-28 09:27:58 +00:00

tiagoagueda commented

2026-08-28 14:22:15 +00:00

Author

Owner

Raised from P4 to P3: HDMI now produces a picture (#22). Still config-only (CONFIG_DRM_DW_HDMI_CEC + CEC_CORE), and whether the board routes PH21 to connector pin 13 is still unverified.

Raised from P4 to P3: HDMI now produces a picture (#22). Still config-only (`CONFIG_DRM_DW_HDMI_CEC` + `CEC_CORE`), and whether the board routes PH21 to connector pin 13 is still unverified.

tiagoagueda commented

2026-08-28 16:37:48 +00:00

Author

Owner

Done, 2026-08-28. Working, and the wiring question is answered.

Two config symbols, exactly as this issue predicted - CONFIG_MEDIA_CEC_SUPPORT and
CONFIG_DRM_DW_HDMI_CEC. No code.

Driver Name       : sun8i-dw-hdmi
Physical Address  : 1.1.0.0
Logical Address   : 4 (Playback Device 1)

Transmit from Playback Device 1 to TV (4 to 0):
GIVE_DEVICE_POWER_STATUS (0x8f)
    Received from TV (0):
    REPORT_POWER_STATUS (0x90):  pwr-state: on (0x00)

The reply settles the wiring - the same standard the EDID read met for video. PH21 does
reach connector pin 13.

A full bus scan also found what the board is plugged into, which was not previously recorded
anywhere:

0.0.0.0: TV
    1.0.0.0: Audio System            Sony HT-G700 soundbar
        1.1.0.0: Playback Device 1   <- this board
        1.1.0.0: Playback Device 3   Chromecast

Volume keys and SYSTEM_AUDIO_MODE_REQUEST were also exercised against the soundbar during
the HDMI audio work and it responds. Note it ignores GIVE_AUDIO_STATUS entirely (Rx
Timeout), so its volume and mute state cannot be read over CEC.

See 47-hdmi-audio-cec.md.

**Done, 2026-08-28.** Working, and the wiring question is answered. Two config symbols, exactly as this issue predicted - `CONFIG_MEDIA_CEC_SUPPORT` and `CONFIG_DRM_DW_HDMI_CEC`. No code. ``` Driver Name : sun8i-dw-hdmi Physical Address : 1.1.0.0 Logical Address : 4 (Playback Device 1) Transmit from Playback Device 1 to TV (4 to 0): GIVE_DEVICE_POWER_STATUS (0x8f) Received from TV (0): REPORT_POWER_STATUS (0x90): pwr-state: on (0x00) ``` **The reply settles the wiring** - the same standard the EDID read met for video. PH21 does reach connector pin 13. A full bus scan also found what the board is plugged into, which was not previously recorded anywhere: ``` 0.0.0.0: TV 1.0.0.0: Audio System Sony HT-G700 soundbar 1.1.0.0: Playback Device 1 <- this board 1.1.0.0: Playback Device 3 Chromecast ``` Volume keys and `SYSTEM_AUDIO_MODE_REQUEST` were also exercised against the soundbar during the HDMI audio work and it responds. Note it ignores `GIVE_AUDIO_STATUS` entirely (Rx Timeout), so its volume and mute state cannot be read over CEC. See `47-hdmi-audio-cec.md`.

tiagoagueda closed this issue

2026-08-28 16:37:48 +00:00

tiagoagueda referenced this issue from a commit

2026-08-29 11:58:09 +00:00

Audio is audible, after two clock faults and an instrument I ignored

tiagoagueda referenced this issue from a commit

2026-08-29 12:07:51 +00:00

Audio is audible, after two clock faults and an instrument I ignored